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<body class="article">
<div id="header">
<h1>NVIDIA Virtual P-state Table Specification</h1>
</div>
<div id="content">
<div class="sect1">
<h2 id="_purpose">Purpose</h2>
<div class="sectionbody">
<div class="paragraph"><p>This document describes the Virtual P-state (vP-state) Table in the NVIDIA VBIOS.</p></div>
<div class="paragraph"><p>The Virtual P-state (vP-state) Table maps discreet points on the Voltage/Frequency curve to vP-states.
These vP-states are typically used as caps (limits).</p></div>
<div class="admonitionblock">
<table><tr>
<td class="icon">
<div class="title">Note</div>
</td>
<td class="content">This specification only provides the details about vP-state entry which is required to fetch base clock.</td>
</tr></table>
</div>
</div>
</div>
<div class="sect1">
<h2 id="_virtual_p_state_table">Virtual P-state Table</h2>
<div class="sectionbody">
<div class="paragraph"><p>The Virtual P-state Table starts with a header, followed immediately by an array of entries.</p></div>
<div class="paragraph"><p>It consist of following sections:</p></div>
<div class="ulist"><ul>
<li>
<p>
Header – The version number, header size, size of each vP-state entry, number of vP-state entries, etc.
</p>
</li>
<li>
<p>
Entry – One for each vP-state. It consist of associated P-state.
</p>
</li>
<li>
<p>
Domain frequencies – Sub-table in vP-state entry table consisting of limits for domain frequencies.
</p>
</li>
</ul></div>
<div class="paragraph"><p>The vP-state table is a part of BIOS information table’s (BIT) Performance table entry (ID = ‘P’ i.e. 0x50 and version = 2)
and its location is extracted by reading 32 bit dword from an offset 0x38 from the performance table (refer to <a href="#_sample_code">sample code</a>).</p></div>
<div class="sect2">
<h3 id="_virtual_p_state_table_version">Virtual P-state Table Version</h3>
<div class="paragraph"><p>This document describes vP-state table version 1.0 which is supported only on GPU families GF11X through GM20X
(i.e. NVC0 through NV110 families as per nouveau’s code names).</p></div>
<div class="admonitionblock">
<table><tr>
<td class="icon">
<div class="title">Note</div>
</td>
<td class="content">Table version and structure will change in Pascal and later GPUs.</td>
</tr></table>
</div>
</div>
<div class="sect2">
<h3 id="_virtual_p_state_table_header_structure">Virtual P-state Table Header Structure</h3>
<div class="tableblock">
<table rules="all"
width="100%"
frame="border"
cellspacing="0" cellpadding="4">
<col width="28%" />
<col width="2%" />
<col width="68%" />
<thead>
<tr>
<th align="left" valign="top"> Name </th>
<th align="right" valign="top"> Bit width </th>
<th align="left" valign="top"> Meaning and (Values)</th>
</tr>
</thead>
<tbody>
<tr>
<td align="left" valign="top"><p class="table">Version</p></td>
<td align="right" valign="top"><p class="table">8</p></td>
<td align="left" valign="top"><p class="table">Virtual P-state Table Version (0x10)</p></td>
</tr>
<tr>
<td align="left" valign="top"><p class="table">Header Size</p></td>
<td align="right" valign="top"><p class="table">8</p></td>
<td align="left" valign="top"><p class="table">Size of Virtual P-state Table Header in bytes (20)</p></td>
</tr>
<tr>
<td align="left" valign="top"><p class="table">Base Entry Size</p></td>
<td align="right" valign="top"><p class="table">8</p></td>
<td align="left" valign="top"><p class="table">Size of Virtual P-state Table Entry in bytes, not including the domain frequencies (5)</p></td>
</tr>
<tr>
<td align="left" valign="top"><p class="table">Domain Freq Size</p></td>
<td align="right" valign="top"><p class="table">8</p></td>
<td align="left" valign="top"><p class="table">Size of each Virtual P-state Domain Frequency Entry in bytes (2)</p></td>
</tr>
<tr>
<td align="left" valign="top"><p class="table">Domain Freq Count</p></td>
<td align="right" valign="top"><p class="table">8</p></td>
<td align="left" valign="top"><p class="table">Number of Virtual P-state Domain Frequencies allocated</p></td>
</tr>
<tr>
<td align="left" valign="top"><p class="table">Entry Count</p></td>
<td align="right" valign="top"><p class="table">8</p></td>
<td align="left" valign="top"><p class="table">Number of Virtual P-state Table Entries</p></td>
</tr>
<tr>
<td align="left" valign="top"><p class="table">Reserved</p></td>
<td align="right" valign="top"><p class="table">88</p></td>
<td align="left" valign="top"><p class="table"></p></td>
</tr>
<tr>
<td align="left" valign="top"><p class="table">Index of Rated TDP vP-state (Base Clock)</p></td>
<td align="right" valign="top"><p class="table">8</p></td>
<td align="left" valign="top"><p class="table">Fastest thermally sustainable vP-state for the TDP app on worst case silicon, worst case conditions (also known as base clock)</p></td>
</tr>
<tr>
<td align="left" valign="top"><p class="table">Reserved</p></td>
<td align="right" valign="top"><p class="table">40</p></td>
<td align="left" valign="top"><p class="table"></p></td>
</tr>
</tbody>
</table>
</div>
</div>
<div class="sect2">
<h3 id="_virtual_p_state_table_entry_structure">Virtual P-state Table Entry Structure</h3>
<div class="tableblock">
<table rules="all"
width="100%"
frame="border"
cellspacing="0" cellpadding="4">
<col width="28%" />
<col width="2%" />
<col width="68%" />
<thead>
<tr>
<th align="left" valign="top"> Name </th>
<th align="right" valign="top"> Bit width </th>
<th align="left" valign="top"> Values and Meaning</th>
</tr>
</thead>
<tbody>
<tr>
<td align="left" valign="top"><p class="table">P-state</p></td>
<td align="right" valign="top"><p class="table">8</p></td>
<td align="left" valign="top"><p class="table">P-state associated with this vP-state. A value of 0xff indicates SKIP ENTRY.</p></td>
</tr>
<tr>
<td align="left" valign="top"><p class="table">Reserved</p></td>
<td align="right" valign="top"><p class="table">32</p></td>
<td align="left" valign="top"><p class="table"></p></td>
</tr>
</tbody>
</table>
</div>
</div>
<div class="sect2">
<h3 id="_virtual_p_state_domain_frequency_entry_structure">Virtual P-state Domain Frequency Entry Structure</h3>
<div class="paragraph"><p>This is a sub-table in Virtual P-state Table Entry. Domain frequency entries are indexed as per clock domain enumeration.</p></div>
<div class="tableblock">
<table rules="all"
width="100%"
frame="border"
cellspacing="0" cellpadding="4">
<col width="28%" />
<col width="2%" />
<col width="68%" />
<thead>
<tr>
<th align="left" valign="top"> Name </th>
<th align="right" valign="top"> Bit width </th>
<th align="left" valign="top"> Values and Meaning</th>
</tr>
</thead>
<tbody>
<tr>
<td align="left" valign="top"><p class="table">Domain Frequency</p></td>
<td align="right" valign="top"><p class="table">16</p></td>
<td align="left" valign="top"><p class="table">Domain frequency associated with this vP-state in MHz. A value of 0 indicates that vP-states do not specify a limit for this domain.</p></td>
</tr>
</tbody>
</table>
</div>
<div class="paragraph"><p>It is safe to assume that there will always be one domain frequency entry per vP-state table entry. Non-zero value of this entry belongs to GPC clock domain.</p></div>
</div>
</div>
</div>
<div class="sect1">
<h2 id="_sample_code">Sample code</h2>
<div class="sectionbody">
<div class="paragraph"><p>Sample code to read base clock from vP-state table.</p></div>
<div class="admonitionblock">
<table><tr>
<td class="icon">
<div class="title">Note</div>
</td>
<td class="content">this code is based on nouveau driver which is capable of reading various entries from BIT.</td>
</tr></table>
</div>
<div class="listingblock">
<div class="content"><!-- Generator: GNU source-highlight 3.1.6
by Lorenzo Bettini
http://www.lorenzobettini.it
http://www.gnu.org/software/src-highlite -->
<pre><tt><span style="color: #000000">    1:</span> void <span style="font-weight: bold"><span style="color: #000000">read_vpstate_table</span></span><span style="color: #990000">(</span>struct nvkm_bios <span style="color: #990000">*</span>bios<span style="color: #990000">)</span>
<span style="color: #000000">    2:</span> <span style="color: #990000">{</span>
<span style="color: #000000">    3:</span>         struct bit_entry bit_P<span style="color: #990000">;</span>
<span style="color: #000000">    4:</span>         u16 vpstate_tbl <span style="color: #990000">=</span> <span style="color: #993399">0x0000</span><span style="color: #990000">,</span> offset<span style="color: #990000">,</span> domain_clk<span style="color: #990000">;</span>
<span style="color: #000000">    5:</span>         u8 ver<span style="color: #990000">,</span> i<span style="color: #990000">,</span> hdr_size<span style="color: #990000">,</span> base_entry_size<span style="color: #990000">,</span> domain_freq_size<span style="color: #990000">,</span> domain_freq_count<span style="color: #990000">,</span> base_clk_idx<span style="color: #990000">;</span>
<span style="color: #000000">    6:</span>
<span style="color: #000000">    7:</span>         <span style="font-weight: bold"><span style="color: #0000FF">if</span></span> <span style="color: #990000">(!</span><span style="font-weight: bold"><span style="color: #000000">bit_entry</span></span><span style="color: #990000">(</span>bios<span style="color: #990000">,</span> <span style="color: #FF0000">'P'</span><span style="color: #990000">,</span> <span style="color: #990000">&amp;</span>bit_P<span style="color: #990000">))</span> <span style="color: #990000">{</span>
<span style="color: #000000">    8:</span>                 <span style="font-weight: bold"><span style="color: #0000FF">if</span></span> <span style="color: #990000">(</span>bit_P<span style="color: #990000">.</span>version <span style="color: #990000">==</span> <span style="color: #993399">2</span><span style="color: #990000">)</span>
<span style="color: #000000">    9:</span>                         vpstate_tbl <span style="color: #990000">=</span> <span style="font-weight: bold"><span style="color: #000000">nvbios_rd16</span></span><span style="color: #990000">(</span>bios<span style="color: #990000">,</span> bit_P<span style="color: #990000">.</span>offset <span style="color: #990000">+</span> <span style="color: #993399">0x38</span><span style="color: #990000">);</span>
<span style="color: #000000">   10:</span>                 <span style="font-weight: bold"><span style="color: #0000FF">else</span></span>
<span style="color: #000000">   11:</span>                         <span style="font-weight: bold"><span style="color: #0000FF">return</span></span><span style="color: #990000">;</span>
<span style="color: #000000">   12:</span>
<span style="color: #000000">   13:</span>                 <span style="font-weight: bold"><span style="color: #0000FF">if</span></span> <span style="color: #990000">(</span>vpstate_tbl<span style="color: #990000">)</span> <span style="color: #990000">{</span>
<span style="color: #000000">   14:</span>                         ver <span style="color: #990000">=</span> <span style="font-weight: bold"><span style="color: #000000">nvbios_rd08</span></span><span style="color: #990000">(</span>bios<span style="color: #990000">,</span> vpstate_tbl <span style="color: #990000">+</span> <span style="color: #993399">0</span><span style="color: #990000">);</span>
<span style="color: #000000">   15:</span>                         <span style="font-weight: bold"><span style="color: #000000">printk</span></span><span style="color: #990000">(</span><span style="color: #FF0000">"vP-state entry version = 0x%x\n"</span><span style="color: #990000">,</span> ver<span style="color: #990000">);</span>
<span style="color: #000000">   16:</span>                         <span style="font-weight: bold"><span style="color: #000000">switch</span></span> <span style="color: #990000">(</span>ver<span style="color: #990000">)</span> <span style="color: #990000">{</span>
<span style="color: #000000">   17:</span>                         case <span style="color: #993399">0x10</span><span style="color: #990000">:</span>
<span style="color: #000000">   18:</span>                                 <span style="font-weight: bold"><span style="color: #000000">printk</span></span><span style="color: #990000">(</span><span style="color: #FF0000">"vP-state header size = %d\n"</span><span style="color: #990000">,</span>
<span style="color: #000000">   19:</span>                                         hdr_size <span style="color: #990000">=</span> <span style="font-weight: bold"><span style="color: #000000">nvbios_rd08</span></span><span style="color: #990000">(</span>bios<span style="color: #990000">,</span> vpstate_tbl <span style="color: #990000">+</span> <span style="color: #993399">1</span><span style="color: #990000">));</span>
<span style="color: #000000">   20:</span>                                 <span style="font-weight: bold"><span style="color: #000000">printk</span></span><span style="color: #990000">(</span><span style="color: #FF0000">"base entry size = %d\n"</span><span style="color: #990000">,</span>
<span style="color: #000000">   21:</span>                                         base_entry_size <span style="color: #990000">=</span> <span style="font-weight: bold"><span style="color: #000000">nvbios_rd08</span></span><span style="color: #990000">(</span>bios<span style="color: #990000">,</span> vpstate_tbl <span style="color: #990000">+</span> <span style="color: #993399">2</span><span style="color: #990000">));</span>
<span style="color: #000000">   22:</span>                                 <span style="font-weight: bold"><span style="color: #000000">printk</span></span><span style="color: #990000">(</span><span style="color: #FF0000">"domain freq entry size = %d\n"</span><span style="color: #990000">,</span>
<span style="color: #000000">   23:</span>                                         domain_freq_size <span style="color: #990000">=</span> <span style="font-weight: bold"><span style="color: #000000">nvbios_rd08</span></span><span style="color: #990000">(</span>bios<span style="color: #990000">,</span> vpstate_tbl <span style="color: #990000">+</span> <span style="color: #993399">3</span><span style="color: #990000">));</span>
<span style="color: #000000">   24:</span>                                 <span style="font-weight: bold"><span style="color: #000000">printk</span></span><span style="color: #990000">(</span><span style="color: #FF0000">"domain freq entries count = %d\n"</span><span style="color: #990000">,</span>
<span style="color: #000000">   25:</span>                                         domain_freq_count <span style="color: #990000">=</span> <span style="font-weight: bold"><span style="color: #000000">nvbios_rd08</span></span><span style="color: #990000">(</span>bios<span style="color: #990000">,</span> vpstate_tbl <span style="color: #990000">+</span> <span style="color: #993399">4</span><span style="color: #990000">));</span>
<span style="color: #000000">   26:</span>
<span style="color: #000000">   27:</span>
<span style="color: #000000">   28:</span>                                 base_clk_idx <span style="color: #990000">=</span> <span style="font-weight: bold"><span style="color: #000000">nvbios_rd08</span></span><span style="color: #990000">(</span>bios<span style="color: #990000">,</span> vpstate_tbl <span style="color: #990000">+</span> <span style="color: #993399">17</span><span style="color: #990000">);</span>
<span style="color: #000000">   29:</span>                                 <span style="font-weight: bold"><span style="color: #000000">printk</span></span><span style="color: #990000">(</span><span style="color: #FF0000">"base clk index = %d\n"</span><span style="color: #990000">,</span> base_clk_idx<span style="color: #990000">);</span>
<span style="color: #000000">   30:</span>
<span style="color: #000000">   31:</span>
<span style="color: #000000">   32:</span>                                 offset <span style="color: #990000">=</span> vpstate <span style="color: #990000">+</span> hdr_size <span style="color: #990000">+</span>
<span style="color: #000000">   33:</span>                                         <span style="color: #990000">((</span>base_entry_size <span style="color: #990000">+</span> <span style="color: #990000">(</span>domain_freq_size <span style="color: #990000">*</span> domain_freq_count<span style="color: #990000">))</span> <span style="color: #990000">*</span> base_clk<span style="color: #990000">);</span>
<span style="color: #000000">   34:</span>                                 <span style="font-weight: bold"><span style="color: #000000">printk</span></span><span style="color: #990000">(</span><span style="color: #FF0000">"offset = %d\n"</span><span style="color: #990000">,</span> offset<span style="color: #990000">);</span>
<span style="color: #000000">   35:</span>
<span style="color: #000000">   36:</span>
<span style="color: #000000">   37:</span>                                 <span style="font-weight: bold"><span style="color: #000000">printk</span></span><span style="color: #990000">(</span><span style="color: #FF0000">"p-state for base clk = %d"</span><span style="color: #990000">,</span>
<span style="color: #000000">   38:</span>                                         <span style="font-weight: bold"><span style="color: #000000">nvbios_rd08</span></span><span style="color: #990000">(</span>bios<span style="color: #990000">,</span> offset <span style="color: #990000">+</span> <span style="color: #993399">0</span><span style="color: #990000">));</span>
<span style="color: #000000">   39:</span>
<span style="color: #000000">   40:</span>                                 <span style="font-weight: bold"><span style="color: #0000FF">for</span></span> <span style="color: #990000">(</span>i <span style="color: #990000">=</span> <span style="color: #993399">0</span><span style="color: #990000">;</span> i <span style="color: #990000">&lt;</span> domain_freq_count<span style="color: #990000">;</span> i<span style="color: #990000">++)</span> <span style="color: #990000">{</span>
<span style="color: #000000">   41:</span>                                         domain_clk <span style="color: #990000">=</span> <span style="font-weight: bold"><span style="color: #000000">nvbios_rd16</span></span><span style="color: #990000">(</span>bios<span style="color: #990000">,</span> offset <span style="color: #990000">+</span> base_entry_size <span style="color: #990000">+</span>
<span style="color: #000000">   42:</span>                                                                  <span style="color: #990000">(</span>i <span style="color: #990000">*</span> domain_freq_size<span style="color: #990000">));</span>
<span style="color: #000000">   43:</span>                                         <span style="font-weight: bold"><span style="color: #000000">printk</span></span><span style="color: #990000">(</span><span style="color: #FF0000">"domain clock index = %d, domain clock limit value = %d MHz\n"</span><span style="color: #990000">,</span>
<span style="color: #000000">   44:</span>                                                 i<span style="color: #990000">,</span> domain_clk<span style="color: #990000">);</span>
<span style="color: #000000">   45:</span>                                 <span style="color: #990000">}</span>
<span style="color: #000000">   46:</span>
<span style="color: #000000">   47:</span>                                 <span style="font-weight: bold"><span style="color: #0000FF">return</span></span><span style="color: #990000">;</span>
<span style="color: #000000">   48:</span>                         default<span style="color: #990000">:</span>
<span style="color: #000000">   49:</span>                                 <span style="font-weight: bold"><span style="color: #0000FF">return</span></span><span style="color: #990000">;</span>
<span style="color: #000000">   50:</span>                         <span style="color: #990000">}</span>
<span style="color: #000000">   51:</span>                 <span style="color: #990000">}</span>
<span style="color: #000000">   52:</span>         <span style="color: #990000">}</span>
<span style="color: #000000">   53:</span>
<span style="color: #000000">   54:</span>         <span style="font-weight: bold"><span style="color: #0000FF">return</span></span><span style="color: #990000">;</span>
<span style="color: #000000">   55:</span> <span style="color: #990000">}</span></tt></pre></div></div>
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Last updated 2016-03-28
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